Capsim Block Documentation
This function generates a random sequence of bits, which can be used to exercise a data transmission system.The early, reference, and late signals are generated with the early signal shifted with the positive edge of the input clock.
Port | Type | Name | |
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0 | float | clock |
Port | Type | Name | |
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0 | float | early | |
1 | float | reference | |
2 | float | late |
Num | Type | Name | Initial Value | Description |
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0 | int | shift_reg | ||
1 | int | no_inbuf | ||
2 | int | no_outbuf | ||
3 | float | fbit_early[100] | ||
4 | float | fbit_temp[100] |
int i,j,k; int samples; int temp_val; int kp; |
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if((no_outbuf = NO_OUTPUT_BUFFERS() ) <= 0) { fprintf(stderr,"pngen: no output buffers\n"); return(1); /* no output buffers */ } shift_reg = initialize; for(i=0; i<101; i++) { fbit_early[i] = 0.0; } |
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for(samples = MIN_AVAIL(); samples > 0; --samples) { temp_val = 0; IT_IN(0); for(i=0; i<2*num_delay; i++) { fbit_temp[i] = fbit_early[i]; } if(clock(1) == 0.0 && clock(0) == 1.0) { for(i=0; i |
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/* Capsim (r) Text Mode Kernel (TMK) Star Library (Blocks) Copyright (C) 1989-2017 Silicon DSP Corporation This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with this library; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA http://www.silicondsp.com Silicon DSP Corporation Las Vegas, Nevada */ |
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/* pngen.s */ /********************************************************************** pngen() *********************************************************************** This function generates a random sequence of bits, which can be used to exercise a data transmission system. The early, reference, and late signals are generated with the early signal shifted with the positive edge of the input clock. Any degree polynomial can be implemented as specified in a parameter array. Input parameters: num_delay: Number of samples to delay each way shift_length: Length of shift register poly[]: Generation polynomial in array shift_reg: Initial shift reg for pseudo random sequence |
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